1. Field of the Invention
The present invention relates to a method for tracing a program executed on a system comprising a plurality of processing units, and a system comprising a plurality of processing units.
2. Description of the Related Art
A technique for tracing the operations of an operating system (OS), or the operations of a program running on the OS is known. By way of example, for Linux, LKST (Linux Kernel State Tracer), or LTT (Linux Trace Toolkit) is well known as a tracer of an event within a kernel of Linux.
In the meantime, a system comprising a plurality of CPUs (Central Processing Units), such as an SMP (Symmetric Multiple Processor) system or an NUMA (Non Uniform Memory Access) system is known.
In the NUMA system, one or more CPUs and a memory module are arranged on each node (CPU board).
In the conventional NUMA system, an area for storing trace information is secured within a memory module of a specific node. For example, as shown in FIG. 1, if a node of a CPU which is executing a trace process is different from that of a memory module where the area for storing trace information is secured, a memory access between the nodes must be made, leading to an increase in the overhead of the access. Accordingly, if an interrupt caused by another process having a higher priority, which uses the bus between the nodes, occurs after the memory access between the nodes starts, the process having the higher priority must be made to wait.
Additionally, Patent Document 1 discloses a technique for verifying cache coherency in an NUMA system comprising a plurality of nodes.
[Patent Document 1] United States Patent Publication No. U.S. Pat. No. 6,785,773 B2 “Verification of Global Coherence in a Multi-Node Numa System”